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| author | Will Deacon | 2014-05-09 19:36:27 +0200 |
|---|---|---|
| committer | Russell King | 2014-05-26 00:47:46 +0200 |
| commit | 9581960a40ab0e281b695bf03744c8924ec3b5d0 (patch) | |
| tree | ff48508723eef430b3afb1fe48f19945acb3ed00 /arch/arm/include | |
| parent | ARM: 8046/1: proc: add support for the Cortex-A17 processor (diff) | |
| download | kernel-qcow2-linux-9581960a40ab0e281b695bf03744c8924ec3b5d0.tar.gz kernel-qcow2-linux-9581960a40ab0e281b695bf03744c8924ec3b5d0.tar.xz kernel-qcow2-linux-9581960a40ab0e281b695bf03744c8924ec3b5d0.zip | |
ARM: 8055/1: cacheflush: use -st dsb option for ensuring completion
dsb st can be used to ensure completion of pending cache maintenance
operations, so use it for the v7 cache maintenance operations.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/cacheflush.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 8b8b61685a34..00af9fe435e6 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h @@ -212,7 +212,7 @@ extern void copy_to_user_page(struct vm_area_struct *, struct page *, static inline void __flush_icache_all(void) { __flush_icache_preferred(); - dsb(); + dsb(ishst); } /* |