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authorRussell King2011-06-25 20:25:02 +0200
committerRussell King2011-06-30 12:04:59 +0200
commit8b4186160b7894ca4583f702a562856d5d9e9118 (patch)
treed5937a74e6d3f0738c3ba7eb9383acf51202e62d /arch/arm/kernel/entry-armv.S
parentARM: entry: rejig register allocation in exception entry handlers (diff)
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ARM: entry: prefetch abort helper: pass aborted pc in r4 rather than r0
This avoids unnecessary instructions for CPUs which implement the IFAR (instruction fault address register). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-armv.S')
-rw-r--r--arch/arm/kernel/entry-armv.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 582bb2310446..d644d0240ad3 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -45,7 +45,7 @@
.endm
.macro pabt_helper
- mov r0, r4 @ pass address of aborted instruction.
+ @ PABORT handler takes fault address in r4
#ifdef MULTI_PABORT
ldr ip, .LCprocfns
mov lr, pc