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| author | David Griego | 2009-06-01 20:41:54 +0200 |
|---|---|---|
| committer | Kevin Hilman | 2009-08-26 09:56:56 +0200 |
| commit | a23f7dc82d48d7fc8377765f6ede907daef4e63b (patch) | |
| tree | 2159e2885ae764e70f616faa945c24771c5e86c0 /arch/arm/mach-davinci/time.c | |
| parent | davinci: dm646x: Adds McASP clock (diff) | |
| download | kernel-qcow2-linux-a23f7dc82d48d7fc8377765f6ede907daef4e63b.tar.gz kernel-qcow2-linux-a23f7dc82d48d7fc8377765f6ede907daef4e63b.tar.xz kernel-qcow2-linux-a23f7dc82d48d7fc8377765f6ede907daef4e63b.zip | |
davinci: Fix watchdog reset code
The davinci reset routine, davinci_watchdog_reset(), sets the
TCR register instead of the TGCR register as it should to put
the WDT into its "Initial State".
It also writes the WDTCR register without the proper WDKEY
which is pointless since the register will be write-protected.
Signed-off-by: David Griego <dgriego@mvista.com>
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/time.c')
| -rw-r--r-- | arch/arm/mach-davinci/time.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c index 0884ca57bfb0..ca85d1871762 100644 --- a/arch/arm/mach-davinci/time.c +++ b/arch/arm/mach-davinci/time.c @@ -420,11 +420,11 @@ void davinci_watchdog_reset(void) /* reset timer, set mode to 64-bit watchdog, and unreset */ tgcr = 0; - __raw_writel(tgcr, base + TCR); + __raw_writel(tgcr, base + TGCR); tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT; tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) | (TGCR_UNRESET << TGCR_TIM34RS_SHIFT); - __raw_writel(tgcr, base + TCR); + __raw_writel(tgcr, base + TGCR); /* clear counter and period regs */ __raw_writel(0, base + TIM12); @@ -432,12 +432,8 @@ void davinci_watchdog_reset(void) __raw_writel(0, base + PRD12); __raw_writel(0, base + PRD34); - /* enable */ - wdtcr = __raw_readl(base + WDTCR); - wdtcr |= WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT; - __raw_writel(wdtcr, base + WDTCR); - /* put watchdog in pre-active state */ + wdtcr = __raw_readl(base + WDTCR); wdtcr = (WDTCR_WDKEY_SEQ0 << WDTCR_WDKEY_SHIFT) | (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT); __raw_writel(wdtcr, base + WDTCR); |