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authorLiu Ying2013-07-04 11:22:26 +0200
committerShawn Guo2013-08-16 07:11:24 +0200
commitcbe7fc8aaeefc71a75c2688602ba5bb570c0a265 (patch)
treefbe1e589b95e361002b0f481a4b013c4f30b2d39 /arch/arm/mach-imx/Makefile
parentARM: imx: Select MIGHT_HAVE_CACHE_L2X0 (diff)
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ARM: imx: add common clock support for fixup div
One register may have several fields to control some clocks. It is possible that the read/write values of some fields may map to different real functional values, so writing to the other fields in the same register may break a working clock tree. A real case is the aclk_podf field in the register 'CCM Serial Clock Multiplexer Register 1' of i.MX6Q/SDL SoC. This patch introduces a fixup hook for divider clock which is called before writing a value to clock registers to support this kind of divider clocks. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/Makefile')
-rw-r--r--arch/arm/mach-imx/Makefile3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index e20f22d58fd8..92b91a22eb4d 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -15,7 +15,8 @@ imx5-pm-$(CONFIG_PM) += pm-imx5.o
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(imx5-pm-y)
obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
- clk-pfd.o clk-busy.o clk.o
+ clk-pfd.o clk-busy.o clk.o \
+ clk-fixup-div.o
obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o