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| author | Olof Johansson | 2013-09-17 18:08:24 +0200 |
|---|---|---|
| committer | Olof Johansson | 2013-09-17 18:08:24 +0200 |
| commit | ab5c3b6b5199f30a567335e07ede4dc3face7ec1 (patch) | |
| tree | 0e17544e9a44f1b5d13b1e704e8d05794c689b96 /arch/arm/mach-imx/system.c | |
| parent | mtd: nand: pxa3xx: Remove unneeded ifdef CONFIG_OF (diff) | |
| parent | ARM: dts: imx6q: fix the wrong offset of the Pad Mux register (diff) | |
| download | kernel-qcow2-linux-ab5c3b6b5199f30a567335e07ede4dc3face7ec1.tar.gz kernel-qcow2-linux-ab5c3b6b5199f30a567335e07ede4dc3face7ec1.tar.xz kernel-qcow2-linux-ab5c3b6b5199f30a567335e07ede4dc3face7ec1.zip | |
Merge tag 'imx-fixes-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo, imx fixes for 3.12:
* A couple of clock driver and device tree fixes
* A bug fix for clk-fixup-mux to get imx6sl back to boot
* A L2 cache setting fix for imx6q
* One pinctrl macro fix for UART2 DTE entries
* tag 'imx-fixes-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: dts: imx6q: fix the wrong offset of the Pad Mux register
ARM: imx: i.mx6d/q: disable the double linefill feature of PL310
ARM: imx51.dtsi: fix PATA device clock
ARM: mach-imx: clk-imx51-imx53: Fix 'spdif1_pred' clock registration
ARM: imx: initialize clk_init_data.flags for clk-fixup-mux
ARM: imx27.dtsi: fix CSPI PER clock id
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-imx/system.c')
| -rw-r--r-- | arch/arm/mach-imx/system.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c index 64ff37ea72b1..80c177c36c5f 100644 --- a/arch/arm/mach-imx/system.c +++ b/arch/arm/mach-imx/system.c @@ -117,6 +117,17 @@ void __init imx_init_l2cache(void) /* Configure the L2 PREFETCH and POWER registers */ val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL); val |= 0x70800000; + /* + * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0 + * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2 + * But according to ARM PL310 errata: 752271 + * ID: 752271: Double linefill feature can cause data corruption + * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2 + * Workaround: The only workaround to this erratum is to disable the + * double linefill feature. This is the default behavior. + */ + if (cpu_is_imx6q()) + val &= ~(1 << 30 | 1 << 23); writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL); val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN; writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL); |