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authorStepan Moskovchenko2010-11-13 04:29:47 +0100
committerDaniel Walker2010-11-30 22:53:08 +0100
commit23513c3b39207c569da2c8afdced62ec43b4a272 (patch)
tree6c0762b6fa42f3d1b95c8ba9f67da613b7975856 /arch/arm/mach-msm/include/mach/irqs-8x60.h
parentmsm: gpio: Add irq support to v2 gpiolib. (diff)
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msm: iommu: Increase maximum MID size to 5 bits
On msm8x60, the MID field on the AXI connection to the IOMMU can be up to five bits wide. Thus, allow the IOMMU context platform data to map up to 32 MIDs. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/include/mach/irqs-8x60.h')
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