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author | Stepan Moskovchenko | 2010-11-13 04:29:48 +0100 |
---|---|---|
committer | Daniel Walker | 2010-11-30 22:53:45 +0100 |
commit | c4bd2eebee37b885b47ec48961923b671148703f (patch) | |
tree | a0257c00f0aa720608ff6f173fa4f2566d33fc4b /arch/arm/mach-msm/include/mach/msm_iomap-8x60.h | |
parent | msm: iommu: Increase maximum MID size to 5 bits (diff) | |
download | kernel-qcow2-linux-c4bd2eebee37b885b47ec48961923b671148703f.tar.gz kernel-qcow2-linux-c4bd2eebee37b885b47ec48961923b671148703f.tar.xz kernel-qcow2-linux-c4bd2eebee37b885b47ec48961923b671148703f.zip |
msm: iomap: Addresses and IRQs for 2nd GFX core IOMMU
Add register addresses and IRQ numbers for the IOMMU used
for the second 2D graphics core.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/include/mach/msm_iomap-8x60.h')
-rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-8x60.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h index 45bab50e3ee6..7c43a9bff1a9 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h @@ -98,4 +98,7 @@ #define MSM_IOMMU_GFX2D0_PHYS 0x07D00000 #define MSM_IOMMU_GFX2D0_SIZE SZ_1M +#define MSM_IOMMU_GFX2D1_PHYS 0x07E00000 +#define MSM_IOMMU_GFX2D1_SIZE SZ_1M + #endif |