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| author | Victor Kamensky | 2014-04-15 19:37:46 +0200 |
|---|---|---|
| committer | Tony Lindgren | 2014-05-08 16:09:53 +0200 |
| commit | edfaf05c2fcb853fcf35f12aeb9c340f5913337f (patch) | |
| tree | f3d0d7ca941855237953f65680932a8a433b0ed4 /arch/arm/mach-omap2/clkt2xxx_sys.c | |
| parent | Linux 3.15-rc4 (diff) | |
| download | kernel-qcow2-linux-edfaf05c2fcb853fcf35f12aeb9c340f5913337f.tar.gz kernel-qcow2-linux-edfaf05c2fcb853fcf35f12aeb9c340f5913337f.tar.xz kernel-qcow2-linux-edfaf05c2fcb853fcf35f12aeb9c340f5913337f.zip | |
ARM: OMAP2+: raw read and write endian fix
All OMAP IP blocks expect LE data, but CPU may operate in BE mode.
Need to use endian neutral functions to read/write h/w registers.
I.e instead of __raw_read[lw] and __raw_write[lw] functions code
need to use read[lw]_relaxed and write[lw]_relaxed functions.
If the first simply reads/writes register, the second will byteswap
it if host operates in BE mode.
Changes are trivial sed like replacement of __raw_xxx functions
with xxx_relaxed variant.
Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/clkt2xxx_sys.c')
| -rw-r--r-- | arch/arm/mach-omap2/clkt2xxx_sys.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/clkt2xxx_sys.c b/arch/arm/mach-omap2/clkt2xxx_sys.c index f467d072cd02..58dd3a9b726c 100644 --- a/arch/arm/mach-omap2/clkt2xxx_sys.c +++ b/arch/arm/mach-omap2/clkt2xxx_sys.c @@ -33,7 +33,7 @@ u32 omap2xxx_get_sysclkdiv(void) { u32 div; - div = __raw_readl(prcm_clksrc_ctrl); + div = readl_relaxed(prcm_clksrc_ctrl); div &= OMAP_SYSCLKDIV_MASK; div >>= OMAP_SYSCLKDIV_SHIFT; |