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authorPaul Walmsley2009-01-28 20:35:31 +0100
committerRussell King2009-02-08 18:50:47 +0100
commit883992bd8f6924c9aa849f2dac381075e2e55a9d (patch)
tree30440178d023c8e1334e4e46aa0965906044792d /arch/arm/mach-omap2/clock34xx.h
parent[ARM] omap: fix clockdomain enable/disable ordering (diff)
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[ARM] OMAP2/3 clock: don't tinker with hardirqs when they are supposed to be disabled
Clock rate change code executes inside a spinlock with hardirqs disabled. The only code that should be messing around with the hardirq state should be the plat-omap/clock.c code. In the omap2_reprogram_dpllcore() case, this probably just wastes cycles, but in the omap3_core_dpll_m2_set_rate() case, this is a nasty bug. linux-omap source commit is b9b6208dadb5e0d8b290900a3ffa911673ca97ed. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.h')
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