summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/clock44xx.c
diff options
context:
space:
mode:
authorRajendra Nayak2009-12-08 19:31:44 +0100
committerpaul2009-12-12 01:00:46 +0100
commitd79b126724554122d9598834ef39fb0bb4fc132d (patch)
treef8844ee1cd9698fead9eeea016cdf8abdc62ed01 /arch/arm/mach-omap2/clock44xx.c
parentARM: OMAP4: PM: OMAP4 clock tree and clkdev registration (diff)
downloadkernel-qcow2-linux-d79b126724554122d9598834ef39fb0bb4fc132d.tar.gz
kernel-qcow2-linux-d79b126724554122d9598834ef39fb0bb4fc132d.tar.xz
kernel-qcow2-linux-d79b126724554122d9598834ef39fb0bb4fc132d.zip
ARM: OMAP4: PM: Add dummy hooks for OMAP4 dpll api's
This patch adds dummy hooks for OMAP4 dpll api's. Removes dummy hooks for clkdev api's and enables CLKDEV for OMAP4. Also comments clockdomain calls from within the clock framework as its not supported yet for OMAP4. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock44xx.c')
-rw-r--r--arch/arm/mach-omap2/clock44xx.c58
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock44xx.c b/arch/arm/mach-omap2/clock44xx.c
new file mode 100644
index 000000000000..5b25d38d542e
--- /dev/null
+++ b/arch/arm/mach-omap2/clock44xx.c
@@ -0,0 +1,58 @@
+/*
+ * OMAP4-specific clock framework functions
+ *
+ * Copyright (C) 2009 Texas Instruments, Inc.
+ *
+ * Rajendra Nayak (rnayak@ti.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/errno.h>
+#include "clock.h"
+
+struct clk_functions omap2_clk_functions = {
+ .clk_enable = omap2_clk_enable,
+ .clk_disable = omap2_clk_disable,
+ .clk_round_rate = omap2_clk_round_rate,
+ .clk_set_rate = omap2_clk_set_rate,
+ .clk_set_parent = omap2_clk_set_parent,
+ .clk_disable_unused = omap2_clk_disable_unused,
+};
+
+/*
+ * Dummy functions for DPLL control. Plan is to re-use
+ * existing OMAP3 dpll control functions.
+ */
+
+unsigned long omap3_dpll_recalc(struct clk *clk)
+{
+ return 0;
+}
+
+int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
+{
+ return 0;
+}
+
+int omap3_noncore_dpll_enable(struct clk *clk)
+{
+ return 0;
+}
+
+void omap3_noncore_dpll_disable(struct clk *clk)
+{
+ return;
+}
+
+const struct clkops clkops_noncore_dpll_ops = {
+ .enable = &omap3_noncore_dpll_enable,
+ .disable = &omap3_noncore_dpll_disable,
+};
+
+void omap2_clk_prepare_for_reboot(void)
+{
+ return;
+}