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| author | NeilBrown | 2012-04-25 05:05:24 +0200 |
|---|---|---|
| committer | Kevin Hilman | 2012-05-12 01:46:17 +0200 |
| commit | e3c83c2db458f1e040c5b4bb19773c458e0240a8 (patch) | |
| tree | 00d5527eeb65c5e29b1a12de75f62004e0a5e657 /arch/arm/mach-omap2/irq.c | |
| parent | GPMC: add ECC control definitions (diff) | |
| download | kernel-qcow2-linux-e3c83c2db458f1e040c5b4bb19773c458e0240a8.tar.gz kernel-qcow2-linux-e3c83c2db458f1e040c5b4bb19773c458e0240a8.tar.xz kernel-qcow2-linux-e3c83c2db458f1e040c5b4bb19773c458e0240a8.zip | |
ARM: OMAP2+: INTC: fix suspend abort, set IRQCHIP_SKIP_SET_WAKE
Without an ->irq_set_wake() method in an irq_chip, calls to
enable_irq_wake() will fail. This also causes these interrupts to not
be able to abort suspend (via check_wakeup_irqs() in late suspend.)
Currently, we don't implement ->irq_set_wake() for INTC interrupts
because they default to be wakeup enabled by setting the GRPSEL bits
in PM init. Even though there is no ->irq_set_wake(), we want
enable_irq_wake() to succeed so these interrupts can abort suspend
when necessary.
To fix, set IRQCHIP_SKIP_SET_WAKE flag for all the INTC
interrupts which avoids trying to check irq_chip->irq_set_wake()
and failing when it doesn't exist.
Longer term, we need to implement ->irq_set_wake() for the INTC
which can manage the appropriate GRPSEL bits.
Signed-off-by: NeilBrown <neilb@suse.de>
[khilman@ti.com: rework changelog]
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/irq.c')
| -rw-r--r-- | arch/arm/mach-omap2/irq.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 65f0d2571c9a..b0790a995dc9 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c @@ -148,6 +148,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) ct->chip.irq_ack = omap_mask_ack_irq; ct->chip.irq_mask = irq_gc_mask_disable_reg; ct->chip.irq_unmask = irq_gc_unmask_enable_reg; + ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE; ct->regs.ack = INTC_CONTROL; ct->regs.enable = INTC_MIR_CLEAR0; |