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| author | Sricharan R | 2013-09-18 13:20:11 +0200 |
|---|---|---|
| committer | Tony Lindgren | 2013-10-08 23:26:06 +0200 |
| commit | 38a1981ce31dc4c527cbc0137f638543261b471a (patch) | |
| tree | 01cd91e9b8dbba695c48207855ba496aa0216d80 /arch/arm/mach-omap2/timer.c | |
| parent | Linux 3.12-rc4 (diff) | |
| download | kernel-qcow2-linux-38a1981ce31dc4c527cbc0137f638543261b471a.tar.gz kernel-qcow2-linux-38a1981ce31dc4c527cbc0137f638543261b471a.tar.xz kernel-qcow2-linux-38a1981ce31dc4c527cbc0137f638543261b471a.zip | |
ARM: OMAP2+: DRA7: realtime_counter: Add ratio registers for 20MHZ sys-clk frequency
The real time counter also called master counter, is a free-running
counter. It produces the count used by the CPU local timer peripherals
in the MPU cluster. The timer counts at a rate of 6.144 MHz.
The ratio registers are missing for a sys-clk of 20MHZ which is used
by DRA7 socs. So because of this, the counter was getting wrongly
programmed for a sys-clk of 38.4Mhz(default). So adding the ratio
registers for 20MHZ sys-clk.
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/timer.c')
| -rw-r--r-- | arch/arm/mach-omap2/timer.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index fa74a0625da1..d0f80c020423 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -515,6 +515,10 @@ static void __init realtime_counter_init(void) num = 8; den = 25; break; + case 20000000: + num = 192; + den = 625; + break; case 2600000: num = 384; den = 1625; |