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authorDaniel Mack2009-03-04 21:16:57 +0100
committerMark Brown2009-03-06 14:37:12 +0100
commit20a41eac4fbaa22d051d0fbaeaf3315d2d8c4860 (patch)
tree47dbc8522985fd6625ce4de4f76707feca6d4f75 /arch/arm/mach-pxa/include
parentASoC: TWL4030: Make the HS ramp delay configurable (diff)
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ASoC: Fix name of register bit in pxa-ssp
A bit in PXA's SSCR0 register was erroneously named ADC but its name is in fact ACS (audio clock select). Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'arch/arm/mach-pxa/include')
-rw-r--r--arch/arm/mach-pxa/include/mach/regs-ssp.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/mach-pxa/include/mach/regs-ssp.h
index 3c04cde2cf1f..cacdcae451e6 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ssp.h
+++ b/arch/arm/mach-pxa/include/mach/regs-ssp.h
@@ -47,7 +47,7 @@
#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */
#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */
#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */
-#define SSCR0_ADC (1 << 30) /* Audio clock select */
+#define SSCR0_ACS (1 << 30) /* Audio clock select */
#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */
#endif