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authorWill Deacon2012-01-20 12:01:09 +0100
committerRussell King2012-01-23 11:20:04 +0100
commit972da06470519b6eaef9776a586e2353f089de9c (patch)
tree346f0f57424c9e2e01b1fa00113557082028ef1b /arch/arm/mach-realview
parentARM: 7289/1: vmlinux.lds.S: do not hardcode cacheline size as 32 bytes (diff)
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ARM: 7290/1: vmlinux.lds.S: align the exception fixup table to a 4-byte boundary
The exception fixup table is currently aligned to a 32-byte boundary. Whilst this won't cause any problems, the exception_table_entry structures contain only a pair of unsigned longs, so 4-byte alignment is all that is required. If the table was walked from start to end, cacheline alignment may bring some performance benefits, but since a binary search is used, the access pattern is random and will not benefit from a stricter alignment. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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