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authorJoseph Lo2013-07-03 11:50:41 +0200
committerStephen Warren2013-07-19 18:08:07 +0200
commit3f1be81eef0de7193aae389663f50d38df3a3788 (patch)
tree3bff078600186eb439d7deb1c5b32590ed10443c /arch/arm/mach-tegra/pmc.c
parentARM: tegra: add low level code for Tegra114 cluster power down (diff)
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ARM: tegra: shut off the CPU rail when the last CPU in suspend
When the last CPU core in suspend, the CPU power rail can be turned off by setting flags to flow controller. Then the flow controller will inform PMC to turn off the CPU rail when the last CPU goes into suspend. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pmc.c')
-rw-r--r--arch/arm/mach-tegra/pmc.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
index eb3fa4aee0e4..8345fcdcc9d5 100644
--- a/arch/arm/mach-tegra/pmc.c
+++ b/arch/arm/mach-tegra/pmc.c
@@ -21,6 +21,7 @@
#include <linux/of.h>
#include <linux/of_address.h>
+#include "flowctrl.h"
#include "fuse.h"
#include "pm.h"
#include "pmc.h"
@@ -195,13 +196,26 @@ enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void)
void tegra_pmc_pm_set(enum tegra_suspend_mode mode)
{
- u32 reg;
+ u32 reg, csr_reg;
unsigned long rate = 0;
reg = tegra_pmc_readl(PMC_CTRL);
reg |= TEGRA_POWER_CPU_PWRREQ_OE;
reg &= ~TEGRA_POWER_EFFECT_LP0;
+ switch (tegra_chip_id) {
+ case TEGRA20:
+ case TEGRA30:
+ break;
+ default:
+ /* Turn off CRAIL */
+ csr_reg = flowctrl_read_cpu_csr(0);
+ csr_reg &= ~FLOW_CTRL_CSR_ENABLE_EXT_MASK;
+ csr_reg |= FLOW_CTRL_CSR_ENABLE_EXT_CRAIL;
+ flowctrl_write_cpu_csr(0, csr_reg);
+ break;
+ }
+
switch (mode) {
case TEGRA_SUSPEND_LP2:
rate = clk_get_rate(tegra_pclk);