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| author | Russell King | 2011-03-17 00:35:25 +0100 |
|---|---|---|
| committer | Russell King | 2011-03-17 00:35:25 +0100 |
| commit | 1f0090a1eaa1b750a2fc5c99c91b790d5322a1fd (patch) | |
| tree | c685060f260410e6704c9dfd457ed8c347141f1d /arch/arm/mm/Kconfig | |
| parent | Merge branches 'at91', 'ep93xx', 'errata', 'footbridge', 'fncpy', 'gemini', '... (diff) | |
| parent | ARM: 6806/1: irq: introduce entry and exit functions for chained handlers (diff) | |
| download | kernel-qcow2-linux-1f0090a1eaa1b750a2fc5c99c91b790d5322a1fd.tar.gz kernel-qcow2-linux-1f0090a1eaa1b750a2fc5c99c91b790d5322a1fd.tar.xz kernel-qcow2-linux-1f0090a1eaa1b750a2fc5c99c91b790d5322a1fd.zip | |
Merge branch 'misc' into devel
Conflicts:
arch/arm/Kconfig
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index e4509bae8fc4..05b26a03c209 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -845,6 +845,11 @@ config CACHE_XSC3L2 help This option enables the L2 cache on XScale3. +config ARM_L1_CACHE_SHIFT_6 + bool + help + Setting ARM L1 cache line size to 64 Bytes. + config ARM_L1_CACHE_SHIFT int default 6 if ARM_L1_CACHE_SHIFT_6 |