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| author | Lennert Buytenhek | 2008-04-24 07:31:46 +0200 |
|---|---|---|
| committer | Nicolas Pitre | 2008-04-28 21:55:57 +0200 |
| commit | c5a1e8f7091c33c7f6b53f070d13380facab6607 (patch) | |
| tree | 5981295568c3e80ff9c5047488ad29e8a63412f3 /arch/arm/mm | |
| parent | [ARM] feroceon: remove CONFIG_CPU_DCACHE_WRITETHROUGH check (diff) | |
| download | kernel-qcow2-linux-c5a1e8f7091c33c7f6b53f070d13380facab6607.tar.gz kernel-qcow2-linux-c5a1e8f7091c33c7f6b53f070d13380facab6607.tar.xz kernel-qcow2-linux-c5a1e8f7091c33c7f6b53f070d13380facab6607.zip | |
[ARM] feroceon: remove CONFIG_CPU_CACHE_ROUND_ROBIN check
Since the Feroceon cache replacement policy is always pseudorandom
(and the relevant control register bit is ignored), remove the
CONFIG_CPU_CACHE_ROUND_ROBIN check from proc-feroceon.S.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/proc-feroceon.S | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index e9ac984d2897..3ceb6785a345 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S @@ -358,9 +358,6 @@ __feroceon_setup: mrc p15, 0, r0, c1, c0 @ get control register v4 bic r0, r0, r5 orr r0, r0, r6 -#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN - orr r0, r0, #0x4000 @ .1.. .... .... .... -#endif mov pc, lr .size __feroceon_setup, . - __feroceon_setup |