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authorAbhijit Pagare2010-01-27 04:12:52 +0100
committerPaul Walmsley2010-01-27 04:12:52 +0100
commit38900c27fbbbe97e16f448b8bc9cafc05af03460 (patch)
tree6b2c90dd83235f0ca08ee0f55c82cf7c45dc3a61 /arch/arm/plat-omap/include/plat/powerdomain.h
parentARM: OMAP4: PM: Add the Autogenerated OMAP4 specific power domain framework. (diff)
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ARM: OMAP4: PM: Adapt the existing OMAP2/3 and common Power Domain Frameworks.
Taking care of the platform specific and common power domains with proper checks. Also refining some Macros according to the latest OMAP4 requirements. Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/plat-omap/include/plat/powerdomain.h')
-rw-r--r--arch/arm/plat-omap/include/plat/powerdomain.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h
index 2510005e5ef0..bac378eff8df 100644
--- a/arch/arm/plat-omap/include/plat/powerdomain.h
+++ b/arch/arm/plat-omap/include/plat/powerdomain.h
@@ -51,16 +51,16 @@
*/
/*
- * Number of memory banks that are power-controllable. On OMAP3430, the
- * maximum is 4.
+ * Number of memory banks that are power-controllable. On OMAP4430, the
+ * maximum is 5.
*/
-#define PWRDM_MAX_MEM_BANKS 4
+#define PWRDM_MAX_MEM_BANKS 5
/*
* Maximum number of clockdomains that can be associated with a powerdomain.
- * CORE powerdomain on OMAP3 is the worst case
+ * CORE powerdomain on OMAP4 is the worst case
*/
-#define PWRDM_MAX_CLKDMS 4
+#define PWRDM_MAX_CLKDMS 9
/* XXX A completely arbitrary number. What is reasonable here? */
#define PWRDM_TRANSITION_BAILOUT 100000