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authorRajendra Nayak2010-05-19 04:24:03 +0200
committerPaul Walmsley2010-05-20 20:31:13 +0200
commit90dbc7b0b80725afd7ed52f18e541dbc671dfd70 (patch)
treecc4627d059e2102434b16d623b4fff3b9032776c /arch/arm/plat-omap/include/plat/powerdomain.h
parentOMAP3 clock: add support for setting the divider for sys_clkout2 using clk_se... (diff)
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OMAP4 powerdomain: Support LOWPOWERSTATECHANGE for powerdomains
Some powerdomains in OMAP4 support a direct transition from one sleep state to another deeper sleep state without having to wakeup the powerdomain. This patch adds an api in the powerdomain framework to set the LOWPOWERSTATECHANGE bit in PWRSTCTRL register. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/plat-omap/include/plat/powerdomain.h')
-rw-r--r--arch/arm/plat-omap/include/plat/powerdomain.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h
index e7cc7e66e977..fb6ec74fe39e 100644
--- a/arch/arm/plat-omap/include/plat/powerdomain.h
+++ b/arch/arm/plat-omap/include/plat/powerdomain.h
@@ -50,6 +50,12 @@
* in MEM bank 1 position. This is
* true for OMAP3430
*/
+#define PWRDM_HAS_LOWPOWERSTATECHANGE (1 << 2) /*
+ * support to transition from a
+ * sleep state to a lower sleep
+ * state without waking up the
+ * powerdomain
+ */
/*
* Number of memory banks that are power-controllable. On OMAP4430, the