diff options
| author | Ben Dooks | 2010-05-04 07:38:49 +0200 |
|---|---|---|
| committer | Ben Dooks | 2010-05-06 02:32:29 +0200 |
| commit | 40b956f026a3303a67d2ab7fffa2331f72e1e019 (patch) | |
| tree | acd4f5e5e42740f548410cecdd55c43e319d629a /arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | |
| parent | ARM: S3C24XX: Change s3c2410_gpio_pullupl(x, 1) to use s3c_gpio_cfgpull() (diff) | |
| download | kernel-qcow2-linux-40b956f026a3303a67d2ab7fffa2331f72e1e019.tar.gz kernel-qcow2-linux-40b956f026a3303a67d2ab7fffa2331f72e1e019.tar.xz kernel-qcow2-linux-40b956f026a3303a67d2ab7fffa2331f72e1e019.zip | |
ARM: S3C24XX: Drop s3c2410 specific s3c2410_gpio_cfgpin()
The s3c_gpio_cfgpin() call should be functionally equivalent, so replace
the s3c2410_gpio_cfgpin() calls in the s3c24xx code with s3c_gpio_cfgpin
to allow moving away from a fixed GPIO number to register address mapping
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c')
| -rw-r--r-- | arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c index 71256ad6e8ea..9793544a6ace 100644 --- a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c +++ b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c @@ -21,14 +21,14 @@ void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, int enable) { if (enable) { - s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0); - s3c2410_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0); - s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0); + s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0); + s3c_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0); + s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0); s3c2410_gpio_pullup(S3C2410_GPE(11), 0); s3c2410_gpio_pullup(S3C2410_GPE(13), 0); } else { - s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); - s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); + s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); + s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); s3c_gpio_cfgpull(S3C2410_GPE(11), S3C_GPIO_PULL_NONE); s3c_gpio_cfgpull(S3C2410_GPE(12), S3C_GPIO_PULL_NONE); s3c_gpio_cfgpull(S3C2410_GPE(13), S3C_GPIO_PULL_NONE); |