diff options
| author | Marek Szyprowski | 2010-10-01 03:40:37 +0200 |
|---|---|---|
| committer | Kukjin Kim | 2010-10-21 00:54:56 +0200 |
| commit | 170a46177094b390299d1206748d7f15cd375dc9 (patch) | |
| tree | 81fc5270bbc74d1cf946b2ed265fb85c4dee3ed8 /arch/arm/plat-samsung/include/plat/gpio-cfg.h | |
| parent | ARM: S5PV210: Enable USB HSOTG gadget build (diff) | |
| download | kernel-qcow2-linux-170a46177094b390299d1206748d7f15cd375dc9.tar.gz kernel-qcow2-linux-170a46177094b390299d1206748d7f15cd375dc9.tar.xz kernel-qcow2-linux-170a46177094b390299d1206748d7f15cd375dc9.zip | |
ARM: S5P: Add common S5P GPIO Interrupt support
This patch adds common code to enable support of GPIO interrupt on
S5P SoCs.
The total number of GPIO pins is quite large on S5P SoCs. Registering
irq support for all of them would be a resource waste. Because of that
the interrupt support for standard GPIO pins is registered dynamically
by the s5p_register_gpio_interrupt() function.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title fixes]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/gpio-cfg.h')
| -rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-cfg.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 1c6b92947c5d..5b43b95da68e 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h @@ -169,4 +169,22 @@ extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin); */ extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr); +/** + * s5p_register_gpio_interrupt() - register interrupt support for a gpio group + * @pin: The pin number from the group to be registered + * + * This function registers gpio interrupt support for the group that the + * specified pin belongs to. + * + * The total number of gpio pins is quite large ob s5p series. Registering + * irq support for all of them would be a resource waste. Because of that the + * interrupt support for standard gpio pins is registered dynamically. + * + * It will return the irq number of the interrupt that has been registered + * or -ENOMEM if no more gpio interrupts can be registered. It is allowed + * to call this function more than once for the same gpio group (the group + * will be registered only once). + */ +extern int s5p_register_gpio_interrupt(int pin); + #endif /* __PLAT_GPIO_CFG_H */ |