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author | Arnd Bergmann | 2019-02-15 15:41:09 +0100 |
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committer | Arnd Bergmann | 2019-02-15 15:41:29 +0100 |
commit | 175a366f7036e3210ddd81eb61750ac177413b5e (patch) | |
tree | 97b5458039b5adc440fac63617209907080df70f /arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | |
parent | Merge tag 'sunxi-h3-h5-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/... (diff) | |
parent | arm64: dts: allwinner: a64: Enable PMIC power supplies on various boards (diff) | |
download | kernel-qcow2-linux-175a366f7036e3210ddd81eb61750ac177413b5e.tar.gz kernel-qcow2-linux-175a366f7036e3210ddd81eb61750ac177413b5e.tar.xz kernel-qcow2-linux-175a366f7036e3210ddd81eb61750ac177413b5e.zip |
Merge tag 'sunxi-dt64-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Allwinner arm64 DT changes for 5.1, take 2
Our usual round of DT changes for the arm64 Allwinner SoCs:
- Enabling of the various power supplies on most a64 boards
- H6 SRAM controller support
- A64 CSI support
* tag 'sunxi-dt64-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: a64: Enable PMIC power supplies on various boards
arm64: dts: allwinner: a64: teres-i: enable power supplies
arm64: dts: allwinner: h6: Add support for the SRAM C1 section
dt-bindings: sram: sunxi: Add compatible for the H6 SRAM C1
arm64: dts: allwinner: a64: Add A64 CSI controller
arm64: dts: allwinner: h6: Move GIC device node fix base address ordering
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index cca554c8353f..631b451c5aa5 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -559,6 +559,12 @@ interrupt-controller; #interrupt-cells = <3>; + csi_pins: csi-pins { + pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6", + "PE7", "PE8", "PE9", "PE10", "PE11"; + function = "csi"; + }; + i2c0_pins: i2c0_pins { pins = "PH0", "PH1"; function = "i2c0"; @@ -926,6 +932,20 @@ status = "disabled"; }; + csi: csi@1cb0000 { + compatible = "allwinner,sun50i-a64-csi"; + reg = <0x01cb0000 0x1000>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_DRAM_CSI>; + clock-names = "bus", "mod", "ram"; + resets = <&ccu RST_BUS_CSI>; + pinctrl-names = "default"; + pinctrl-0 = <&csi_pins>; + status = "disabled"; + }; + hdmi: hdmi@1ee0000 { compatible = "allwinner,sun50i-a64-dw-hdmi", "allwinner,sun8i-a83t-dw-hdmi"; |