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author | Eric Anholt | 2016-06-07 13:05:45 +0200 |
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committer | Eric Anholt | 2016-06-08 00:21:55 +0200 |
commit | 9d56c22a78616e79b911f8078e883dac75e513e2 (patch) | |
tree | 451bf658f5a9f52866556944093b58e86e4f3624 /arch/arm64/boot/dts/broadcom/bcm2837.dtsi | |
parent | dt-bindings: Add root properties for Raspberry Pi 3 (diff) | |
download | kernel-qcow2-linux-9d56c22a78616e79b911f8078e883dac75e513e2.tar.gz kernel-qcow2-linux-9d56c22a78616e79b911f8078e883dac75e513e2.tar.xz kernel-qcow2-linux-9d56c22a78616e79b911f8078e883dac75e513e2.zip |
ARM: bcm2835: Add devicetree for the Raspberry Pi 3.
While this devicetree also works for booting in 32-bit mode, it's
placed in arm64 since it's a 64-bit CPU (as suggested by Arnd).
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org> (v1)
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Diffstat (limited to 'arch/arm64/boot/dts/broadcom/bcm2837.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/broadcom/bcm2837.dtsi | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi new file mode 100644 index 000000000000..f2a31d06845d --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi @@ -0,0 +1,76 @@ +#include "../../../../arm/boot/dts/bcm283x.dtsi" + +/ { + compatible = "brcm,bcm2836"; + + soc { + ranges = <0x7e000000 0x3f000000 0x1000000>, + <0x40000000 0x40000000 0x00001000>; + dma-ranges = <0xc0000000 0x00000000 0x3f000000>; + + local_intc: local_intc { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x40000000 0x100>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&local_intc>; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupt-parent = <&local_intc>; + interrupts = <0>, // PHYS_SECURE_PPI + <1>, // PHYS_NONSECURE_PPI + <3>, // VIRT_PPI + <2>; // HYP_PPI + always-on; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000d8>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <1>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e0>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <2>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000e8>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <3>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x000000f0>; + }; + }; +}; + +/* Make the BCM2835-style global interrupt controller be a child of the + * CPU-local interrupt controller. + */ +&intc { + compatible = "brcm,bcm2836-armctrl-ic"; + reg = <0x7e00b200 0x200>; + interrupt-parent = <&local_intc>; + interrupts = <8>; +}; |