diff options
| author | Gregory CLEMENT | 2018-03-01 14:18:19 +0100 |
|---|---|---|
| committer | Gregory CLEMENT | 2018-03-09 17:49:46 +0100 |
| commit | 597667d889517c6085d57aac92dbf1cc624cd8ae (patch) | |
| tree | db56705679a0d3e225d68b1045590b1944fc2fb8 /arch/arm64/boot/dts/marvell | |
| parent | arm64: dts: marvell: use reworked NAND controller driver on Armada 8K (diff) | |
| download | kernel-qcow2-linux-597667d889517c6085d57aac92dbf1cc624cd8ae.tar.gz kernel-qcow2-linux-597667d889517c6085d57aac92dbf1cc624cd8ae.tar.xz kernel-qcow2-linux-597667d889517c6085d57aac92dbf1cc624cd8ae.zip | |
ARM64: dts: marvell: armada-cp110: Add apb_pclk clock for the uart nodes
This extra clock is needed to access the registers of the UARTs used on
CP110 component of the Armada 7K/8K SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell')
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi index d3f422f8f086..355bb295e4d9 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi @@ -303,7 +303,9 @@ reg-shift = <2>; interrupts = <ICU_GRP_NSR 122 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; - clocks = <&CP110_LABEL(clk) 1 21>; + clock-names = "baudclk", "apb_pclk"; + clocks = <&CP110_LABEL(clk) 1 21>, + <&CP110_LABEL(clk) 1 17>; status = "disabled"; }; @@ -313,7 +315,9 @@ reg-shift = <2>; interrupts = <ICU_GRP_NSR 123 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; - clocks = <&CP110_LABEL(clk) 1 21>; + clock-names = "baudclk", "apb_pclk"; + clocks = <&CP110_LABEL(clk) 1 21>, + <&CP110_LABEL(clk) 1 17>; status = "disabled"; }; @@ -323,7 +327,9 @@ reg-shift = <2>; interrupts = <ICU_GRP_NSR 124 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; - clocks = <&CP110_LABEL(clk) 1 21>; + clock-names = "baudclk", "apb_pclk"; + clocks = <&CP110_LABEL(clk) 1 21>, + <&CP110_LABEL(clk) 1 17>; status = "disabled"; }; @@ -333,7 +339,9 @@ reg-shift = <2>; interrupts = <ICU_GRP_NSR 125 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; - clocks = <&CP110_LABEL(clk) 1 21>; + clock-names = "baudclk", "apb_pclk"; + clocks = <&CP110_LABEL(clk) 1 21>, + <&CP110_LABEL(clk) 1 17>; status = "disabled"; }; |