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| author | Baruch Siach | 2018-01-31 07:56:37 +0100 |
|---|---|---|
| committer | Gregory CLEMENT | 2018-02-14 11:42:22 +0100 |
| commit | ff1c516ed1187a23a9c35ca1d8ed179983546ad1 (patch) | |
| tree | 9c70c9a078416ffb5bc5072a312de189fc541762 /arch/arm64/boot/dts/marvell | |
| parent | ARM64: dts: marvell: armada-cp110: Add registers clock for I2C nodes (diff) | |
| download | kernel-qcow2-linux-ff1c516ed1187a23a9c35ca1d8ed179983546ad1.tar.gz kernel-qcow2-linux-ff1c516ed1187a23a9c35ca1d8ed179983546ad1.tar.xz kernel-qcow2-linux-ff1c516ed1187a23a9c35ca1d8ed179983546ad1.zip | |
arm64: dts: marvell: add CP110 uart peripherals
The CP110 component has 4 uart peripherals. All of them use the same clock
gate for slow peripherals that is shared with the i2c and spi peripherals.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'arch/arm64/boot/dts/marvell')
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi index c57bf6661622..9513e461c441 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi @@ -298,6 +298,46 @@ status = "disabled"; }; + CP110_LABEL(uart0): serial@702000 { + compatible = "snps,dw-apb-uart"; + reg = <0x702000 0x100>; + reg-shift = <2>; + interrupts = <ICU_GRP_NSR 122 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <1>; + clocks = <&CP110_LABEL(clk) 1 21>; + status = "disabled"; + }; + + CP110_LABEL(uart1): serial@702100 { + compatible = "snps,dw-apb-uart"; + reg = <0x702100 0x100>; + reg-shift = <2>; + interrupts = <ICU_GRP_NSR 123 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <1>; + clocks = <&CP110_LABEL(clk) 1 21>; + status = "disabled"; + }; + + CP110_LABEL(uart2): serial@702200 { + compatible = "snps,dw-apb-uart"; + reg = <0x702200 0x100>; + reg-shift = <2>; + interrupts = <ICU_GRP_NSR 124 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <1>; + clocks = <&CP110_LABEL(clk) 1 21>; + status = "disabled"; + }; + + CP110_LABEL(uart3): serial@702300 { + compatible = "snps,dw-apb-uart"; + reg = <0x702300 0x100>; + reg-shift = <2>; + interrupts = <ICU_GRP_NSR 125 IRQ_TYPE_LEVEL_HIGH>; + reg-io-width = <1>; + clocks = <&CP110_LABEL(clk) 1 21>; + status = "disabled"; + }; + CP110_LABEL(nand): nand@720000 { /* * Due to the limitation of the pins available |