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| author | Marc Zyngier | 2016-08-11 19:50:50 +0200 |
|---|---|---|
| committer | Andy Gross | 2016-08-24 05:57:35 +0200 |
| commit | 0f6625fd00a534b47add4134c1fc760c9ef2cb58 (patch) | |
| tree | 7f1e060fba1298e79d739e9a9049a970b9336722 /arch/arm64/boot/dts/qcom/msm8996.dtsi | |
| parent | arm64: dts: qcom: msm8916: Add tcsr syscon (diff) | |
| download | kernel-qcow2-linux-0f6625fd00a534b47add4134c1fc760c9ef2cb58.tar.gz kernel-qcow2-linux-0f6625fd00a534b47add4134c1fc760c9ef2cb58.tar.xz kernel-qcow2-linux-0f6625fd00a534b47add4134c1fc760c9ef2cb58.zip | |
arm64: dts: qcom: Fix broken interrupt trigger settings
When a device uses the GIC as its interrupt controller and generates
SPIs, only the values 1 (edge rising) and 4 (level high) are legal.
Anything else is just plain wrong (can't be programmed into the HW),
and leads to aborted driver probes (USB doesn't work with 4.8-rc1
on a Dragonboard 410C).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8996.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 55ec3e8326b7..69ed6e18b875 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -339,7 +339,7 @@ <0x400a000 0x002100>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; - interrupts = <GIC_SPI 326 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>; qcom,ee = <0>; qcom,channel = <0>; #address-cells = <2>; |