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| author | Simon Horman | 2019-05-23 16:25:40 +0200 |
|---|---|---|
| committer | Simon Horman | 2019-06-06 10:59:53 +0200 |
| commit | 9fed1b89c0cdc11645cdb102b9d58598829e319d (patch) | |
| tree | 607a1f377bcfcebae436e93fbdf6ba8c7b301fea /arch/arm64/boot/dts/renesas/r8a7796.dtsi | |
| parent | arm64: dts: renesas: r8a7796: Create thermal zone to support IPA (diff) | |
| download | kernel-qcow2-linux-9fed1b89c0cdc11645cdb102b9d58598829e319d.tar.gz kernel-qcow2-linux-9fed1b89c0cdc11645cdb102b9d58598829e319d.tar.xz kernel-qcow2-linux-9fed1b89c0cdc11645cdb102b9d58598829e319d.zip | |
arm64: dts: renesas: r8a7796: Add dynamic power coefficient
Describe the dynamic power coefficient of A57 and A53 CPUs.
Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a7796.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7796.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index fdadb44847c6..26df5b88efd7 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -160,6 +160,7 @@ power-domains = <&sysc R8A7796_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + dynamic-power-coefficient = <854>; clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; operating-points-v2 = <&cluster0_opp>; capacity-dmips-mhz = <1024>; @@ -187,6 +188,7 @@ next-level-cache = <&L2_CA53>; enable-method = "psci"; #cooling-cells = <2>; + dynamic-power-coefficient = <277>; clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>; |