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| author | Ray Jui | 2015-10-02 19:54:23 +0200 |
|---|---|---|
| committer | Florian Fainelli | 2015-11-16 19:52:01 +0100 |
| commit | 7ac674e8df7aae461b92652026952d5b788c699b (patch) | |
| tree | 1f7c8f1b9f7d8f6b69340521cce6e0b451ad8154 /arch/arm64/boot/dts | |
| parent | arm64: dts: Add IPROC RNG200 DT node for NS2 (diff) | |
| download | kernel-qcow2-linux-7ac674e8df7aae461b92652026952d5b788c699b.tar.gz kernel-qcow2-linux-7ac674e8df7aae461b92652026952d5b788c699b.tar.xz kernel-qcow2-linux-7ac674e8df7aae461b92652026952d5b788c699b.zip | |
arm64: dts: Add I2C nodes for NS2
This patch adds iProc I2C DT nodes for NS2 and enable them for the NS2
SVK board
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Vikram Prakash <vikramp@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts')
| -rw-r--r-- | arch/arm64/boot/dts/broadcom/ns2-svk.dts | 8 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/broadcom/ns2.dtsi | 20 |
2 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts index 244baf879dc9..e5950d5c34e9 100644 --- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts +++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts @@ -52,6 +52,14 @@ }; soc: soc { + i2c0: i2c@66080000 { + status = "ok"; + }; + + i2c1: i2c@660b0000 { + status = "ok"; + }; + uart3: serial@66130000 { status = "ok"; }; diff --git a/arch/arm64/boot/dts/broadcom/ns2.dtsi b/arch/arm64/boot/dts/broadcom/ns2.dtsi index 92ecf1c921e5..f60327780d18 100644 --- a/arch/arm64/boot/dts/broadcom/ns2.dtsi +++ b/arch/arm64/boot/dts/broadcom/ns2.dtsi @@ -178,6 +178,26 @@ <0x65260000 0x1000>; }; + i2c0: i2c@66080000 { + compatible = "brcm,iproc-i2c"; + reg = <0x66080000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 394 IRQ_TYPE_NONE>; + clock-frequency = <100000>; + status = "disabled"; + }; + + i2c1: i2c@660b0000 { + compatible = "brcm,iproc-i2c"; + reg = <0x660b0000 0x100>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 395 IRQ_TYPE_NONE>; + clock-frequency = <100000>; + status = "disabled"; + }; + uart3: serial@66130000 { compatible = "snps,dw-apb-uart"; reg = <0x66130000 0x100>; |