diff options
| author | Dinh Nguyen | 2019-03-28 17:18:42 +0100 |
|---|---|---|
| committer | Dinh Nguyen | 2019-03-28 17:22:25 +0100 |
| commit | f94c0c38689695eb9d8700da112b9584c514a225 (patch) | |
| tree | 51a87cee6d75fa2d6014541f1cb9e464b57fff30 /arch/arm64/configs | |
| parent | arm64: defconfig: enable PCIE_ALTERA (diff) | |
| download | kernel-qcow2-linux-f94c0c38689695eb9d8700da112b9584c514a225.tar.gz kernel-qcow2-linux-f94c0c38689695eb9d8700da112b9584c514a225.tar.xz kernel-qcow2-linux-f94c0c38689695eb9d8700da112b9584c514a225.zip | |
arm64: defconfig: enable fpga and service layer
Enable FPGA framework, Intel Stratix10 SoC FPGA manager, Stratix10
service layer, and Altera Freeze Bridge drivers.
Intel Stratix10 service layer driver was added with commit 7ca5ce896524
("firmware: add Intel Stratix10 service layer driver").
Intel Stratix10 service layer provides kernel APIs for drivers to request
access to the secure features. Such features include FPGA programming,
remote status update, and read and write secure registers.
While clients of the service layer can be built as modules, the service
layer itself has to be configured as built-in. The service layer is
dependent on ARCH_STRATIX10.
Enabling Altera Freeze Bridge depends on commit 38cd7ad5bd25
("fpga: altera_freeze_bridge: remove restriction to socfpga").
Signed-off-by: Richard Gong <richard.gong@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm64/configs')
| -rw-r--r-- | arch/arm64/configs/defconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 2b8c479d88bb..74b6cadde31c 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -84,6 +84,7 @@ CONFIG_ARM_SCPI_CPUFREQ=y CONFIG_ARM_TEGRA186_CPUFREQ=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y +CONFIG_INTEL_STRATIX10_SERVICE=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_EFI_CAPSULE_LOADER=y CONFIG_IMX_SCU=y @@ -736,6 +737,12 @@ CONFIG_QCOM_QFPROM=y CONFIG_ROCKCHIP_EFUSE=y CONFIG_UNIPHIER_EFUSE=y CONFIG_MESON_EFUSE=m +CONFIG_FPGA=y +CONFIG_FPGA_MGR_STRATIX10_SOC=m +CONFIG_FPGA_BRIDGE=m +CONFIG_ALTERA_FREEZE_BRIDGE=m +CONFIG_FPGA_REGION=m +CONFIG_OF_FPGA_REGION=m CONFIG_TEE=y CONFIG_OPTEE=y CONFIG_EXT2_FS=y |