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author | Will Deacon | 2017-11-14 15:33:28 +0100 |
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committer | Will Deacon | 2017-12-11 14:41:03 +0100 |
commit | 18011eac28c7cb31c87b86b7d0e5b01894405c7f (patch) | |
tree | efa4a258adc6d272214883d12316cfa34002b9dc /arch/arm64/include/asm/cpucaps.h | |
parent | arm64: erratum: Work around Falkor erratum #E1003 in trampoline code (diff) | |
download | kernel-qcow2-linux-18011eac28c7cb31c87b86b7d0e5b01894405c7f.tar.gz kernel-qcow2-linux-18011eac28c7cb31c87b86b7d0e5b01894405c7f.tar.xz kernel-qcow2-linux-18011eac28c7cb31c87b86b7d0e5b01894405c7f.zip |
arm64: tls: Avoid unconditional zeroing of tpidrro_el0 for native tasks
When unmapping the kernel at EL0, we use tpidrro_el0 as a scratch register
during exception entry from native tasks and subsequently zero it in
the kernel_ventry macro. We can therefore avoid zeroing tpidrro_el0
in the context-switch path for native tasks using the entry trampoline.
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Tested-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/cpucaps.h')
0 files changed, 0 insertions, 0 deletions