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| author | Jungseok Lee | 2014-05-12 11:40:38 +0200 |
|---|---|---|
| committer | Catalin Marinas | 2014-07-23 16:27:21 +0200 |
| commit | e41ceed035966d593ae34c3de33924965a6b9fba (patch) | |
| tree | 505e26883b4914fa6b131902cd6a4b5f9dccc7b2 /arch/arm64/include/asm/tlb.h | |
| parent | arm64: Do not initialise the fixmap page tables in head.S (diff) | |
| download | kernel-qcow2-linux-e41ceed035966d593ae34c3de33924965a6b9fba.tar.gz kernel-qcow2-linux-e41ceed035966d593ae34c3de33924965a6b9fba.tar.xz kernel-qcow2-linux-e41ceed035966d593ae34c3de33924965a6b9fba.zip | |
arm64: Introduce VA_BITS and translation level options
This patch adds virtual address space size and a level of translation
tables to kernel configuration. It facilicates introduction of
different MMU options, such as 4KB + 4 levels, 16KB + 4 levels and
64KB + 3 levels, easily.
The idea is based on the discussion with Catalin Marinas:
http://www.spinics.net/linux/lists/arm-kernel/msg319552.html
Signed-off-by: Jungseok Lee <jays.lee@samsung.com>
Reviewed-by: Sungjinn Chung <sungjinn.chung@samsung.com>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Jungseok Lee <jungseoklee85@gmail.com>
Diffstat (limited to 'arch/arm64/include/asm/tlb.h')
| -rw-r--r-- | arch/arm64/include/asm/tlb.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h index 80e2c08900d6..bc19101edaeb 100644 --- a/arch/arm64/include/asm/tlb.h +++ b/arch/arm64/include/asm/tlb.h @@ -91,7 +91,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, tlb_remove_page(tlb, pte); } -#ifndef CONFIG_ARM64_64K_PAGES +#ifndef CONFIG_ARM64_2_LEVELS static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, unsigned long addr) { |