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| author | Mark Rutland | 2017-11-21 12:59:13 +0100 |
|---|---|---|
| committer | Will Deacon | 2017-11-28 19:13:18 +0100 |
| commit | f81a348728ec5ac43f3bbcf81c97d52baba253f7 (patch) | |
| tree | 2be7b3bdfa04369661c86d7858bc0f280a08cd01 /arch/arm64/kernel | |
| parent | Linux 4.15-rc1 (diff) | |
| download | kernel-qcow2-linux-f81a348728ec5ac43f3bbcf81c97d52baba253f7.tar.gz kernel-qcow2-linux-f81a348728ec5ac43f3bbcf81c97d52baba253f7.tar.xz kernel-qcow2-linux-f81a348728ec5ac43f3bbcf81c97d52baba253f7.zip | |
arm64: mm: cleanup stale AIVIVT references
Since commit:
155433cb365ee466 ("arm64: cache: Remove support for ASID-tagged VIVT I-caches")
... the kernel no longer cares about AIVIVT I-caches, as these were
removed from the architecture.
This patch removes the stale references to such I-caches.
The comment in flush_context() is also updated to clarify when and where
the TLB invalidation occurs.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel')
0 files changed, 0 insertions, 0 deletions