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authorArnd Bergmann2015-05-29 14:01:52 +0200
committerArnd Bergmann2015-05-29 14:01:52 +0200
commit48150514ae58c5dc3cdf1b6d92487024edbecf9e (patch)
tree74d8bb1b112519569c00ed76c67b734e62aa17c8 /arch/arm64
parentMerge tag 'renesas-dt2-for-v4.2' of git://git.kernel.org/pub/scm/linux/kernel... (diff)
parentarm64: dts: qcom: Add initial set of PMIC and SoC pins for APQ8016 SBC board (diff)
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Merge tag 'qcom-arm64-for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/dt
Merge "Qualcomm ARM64 Updates for v4.2" Kumar Gala: * Added SPMI PMIC Arbiter device tree node for MSM8916 * Added 8x16 chipset SPMI PMIC's nodes * Added MSM8916 restart device node * Added initial set of PMIC and SoC pins for APQ8016 SBC board * tag 'qcom-arm64-for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom: arm64: dts: qcom: Add initial set of PMIC and SoC pins for APQ8016 SBC board arm64: dts: qcom: Add MSM8916 restart device node arm64: dts: qcom: Add 8x16 chipset SPMI PMIC's nodes arm64: dts: qcom: Add SPMI PMIC Arbiter node for MSM8916
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi30
-rw-r--r--arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi21
-rw-r--r--arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi3
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi1
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916.dtsi25
-rw-r--r--arch/arm64/boot/dts/qcom/pm8916.dtsi99
6 files changed, 178 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
new file mode 100644
index 000000000000..535532b9287f
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi
@@ -0,0 +1,30 @@
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+
+&pm8916_gpios {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pm8916_gpios_default>;
+
+ pm8916_gpios_default: default {
+ usb_hub_reset_pm {
+ pins = "gpio1";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ output-low;
+ };
+ usb_sw_sel_pm {
+ pins = "gpio2";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ input-disable;
+ };
+ usr_led_3_ctrl {
+ pins = "gpio3";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ output-low;
+ };
+ usr_led_4_ctrl {
+ pins = "gpio4";
+ function = PMIC_GPIO_FUNC_NORMAL;
+ output-low;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
new file mode 100644
index 000000000000..5f7023f90df7
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-soc-pins.dtsi
@@ -0,0 +1,21 @@
+
+#include <dt-bindings/gpio/gpio.h>
+
+&msmgpio {
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&soc_gpios_default>;
+
+ soc_gpios_default: default {
+ usr_led_1_ctrl_default: usr_led_1_ctrl_default {
+ pins = "gpio21";
+ function = "gpio";
+ output-low;
+ };
+ usr_led_2_ctrl_default: usr_led_2_ctrl_default {
+ pins = "gpio120";
+ function = "gpio";
+ output-low;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
index 703a4f16e711..98abece6b233 100644
--- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
+++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi
@@ -12,6 +12,9 @@
*/
#include "msm8916.dtsi"
+#include "pm8916.dtsi"
+#include "apq8016-sbc-soc-pins.dtsi"
+#include "apq8016-sbc-pmic-pins.dtsi"
/ {
aliases {
diff --git a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
index bea871b0df13..a1aa0b201e92 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-mtp.dtsi
@@ -12,6 +12,7 @@
*/
#include "msm8916.dtsi"
+#include "pm8916.dtsi"
/ {
aliases {
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index f212b8303d04..0f49ebd0aa8b 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -77,7 +77,12 @@
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
- pinctrl@1000000 {
+ restart@4ab000 {
+ compatible = "qcom,pshold";
+ reg = <0x4ab000 0x4>;
+ };
+
+ msmgpio: pinctrl@1000000 {
compatible = "qcom,msm8916-pinctrl";
reg = <0x1000000 0x300000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
@@ -192,5 +197,23 @@
status = "disabled";
};
};
+
+ spmi_bus: spmi@200f000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg = <0x200f000 0x001000>,
+ <0x2400000 0x400000>,
+ <0x2c00000 0x400000>,
+ <0x3800000 0x200000>,
+ <0x200a000 0x002100>;
+ reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+ interrupt-names = "periph_irq";
+ interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
+ qcom,ee = <0>;
+ qcom,channel = <0>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ };
};
};
diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi
new file mode 100644
index 000000000000..b222ece7e3d2
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi
@@ -0,0 +1,99 @@
+#include <dt-bindings/iio/qcom,spmi-vadc.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/spmi/spmi.h>
+
+&spmi_bus {
+
+ usid0: pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rtc@6000 {
+ compatible = "qcom,pm8941-rtc";
+ reg = <0x6000 0x6100>;
+ reg-names = "rtc", "alarm";
+ interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ pwrkey@800 {
+ compatible = "qcom,pm8941-pwrkey";
+ reg = <0x800>;
+ interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
+ debounce = <15625>;
+ bias-pull-up;
+ };
+
+ pm8916_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
+ <0 0xc1 0 IRQ_TYPE_NONE>,
+ <0 0xc2 0 IRQ_TYPE_NONE>,
+ <0 0xc3 0 IRQ_TYPE_NONE>;
+ };
+
+ pm8916_mpps: mpps@a000 {
+ compatible = "qcom,pm8916-mpp";
+ reg = <0xa000 0x400>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupts = <0 0xa0 0 IRQ_TYPE_NONE>,
+ <0 0xa1 0 IRQ_TYPE_NONE>,
+ <0 0xa2 0 IRQ_TYPE_NONE>,
+ <0 0xa3 0 IRQ_TYPE_NONE>;
+ };
+
+ pm8916_temp: temp-alarm@2400 {
+ compatible = "qcom,spmi-temp-alarm";
+ reg = <0x2400 0x100>;
+ interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
+ io-channels = <&pm8916_vadc VADC_DIE_TEMP>;
+ io-channel-names = "thermal";
+ #thermal-sensor-cells = <0>;
+ };
+
+ pm8916_vadc: vadc@3100 {
+ compatible = "qcom,spmi-vadc";
+ reg = <0x3100 0x100>;
+ interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+
+ usb_in {
+ reg = <VADC_USBIN>;
+ qcom,pre-scaling = <1 10>;
+ };
+ vph_pwr {
+ reg = <VADC_VSYS>;
+ qcom,pre-scaling = <1 3>;
+ };
+ die_temp {
+ reg = <VADC_DIE_TEMP>;
+ };
+ ref_625mv {
+ reg = <VADC_REF_625MV>;
+ };
+ ref_1250v {
+ reg = <VADC_REF_1250MV>;
+ };
+ ref_gnd {
+ reg = <VADC_GND_REF>;
+ };
+ ref_vdd {
+ reg = <VADC_VDD_VADC>;
+ };
+ };
+ };
+
+ usid1: pm8916@1 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x1 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+};