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authorRabin Vincent2015-02-19 17:35:28 +0100
committerJesper Nilsson2015-03-25 10:55:10 +0100
commit47a8f6fb349c977ff752f979b159aef96a0bb352 (patch)
tree53c52b00d97eb5b0e284b67d66f09ed7ab9a5744 /arch/cris/arch-v32/kernel/head.S
parentCRISv32: don't enable irqs in INIT_THREAD (diff)
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CRIS: remove SMP code
The CRIS SMP code cannot be built since there is no (and appears to never have been) a CONFIG_SMP Kconfig option in arch/cris/. Remove it. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Jesper Nilsson <jespern@axis.com>
Diffstat (limited to 'arch/cris/arch-v32/kernel/head.S')
-rw-r--r--arch/cris/arch-v32/kernel/head.S32
1 files changed, 0 insertions, 32 deletions
diff --git a/arch/cris/arch-v32/kernel/head.S b/arch/cris/arch-v32/kernel/head.S
index 51e34165ece7..74a66e0e3777 100644
--- a/arch/cris/arch-v32/kernel/head.S
+++ b/arch/cris/arch-v32/kernel/head.S
@@ -52,11 +52,6 @@ tstart:
GIO_INIT
-#ifdef CONFIG_SMP
-secondary_cpu_entry: /* Entry point for secondary CPUs */
- di
-#endif
-
;; Setup and enable the MMU. Use same configuration for both the data
;; and the instruction MMU.
;;
@@ -164,33 +159,6 @@ secondary_cpu_entry: /* Entry point for secondary CPUs */
nop
nop
-#ifdef CONFIG_SMP
- ;; Read CPU ID
- move 0, $srs
- nop
- nop
- nop
- move $s12, $r0
- cmpq 0, $r0
- beq master_cpu
- nop
-slave_cpu:
- ; Time to boot-up. Get stack location provided by master CPU.
- move.d smp_init_current_idle_thread, $r1
- move.d [$r1], $sp
- add.d 8192, $sp
- move.d ebp_start, $r0 ; Defined in linker-script.
- move $r0, $ebp
- jsr smp_callin
- nop
-master_cpu:
- /* Set up entry point for secondary CPUs. The boot ROM has set up
- * EBP at start of internal memory. The CPU will get there
- * later when we issue an IPI to them... */
- move.d MEM_INTMEM_START + IPI_INTR_VECT * 4, $r0
- move.d secondary_cpu_entry, $r1
- move.d $r1, [$r0]
-#endif
; Check if starting from DRAM (network->RAM boot or unpacked
; compressed kernel), or directly from flash.
lapcq ., $r0