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| author | Simon Arlott | 2007-05-02 19:27:05 +0200 |
|---|---|---|
| committer | Andi Kleen | 2007-05-02 19:27:05 +0200 |
| commit | 0949be35095b53dbaa72db700cb5074c5c249629 (patch) | |
| tree | 4dcca21a4e726dae5dd7afcaaebff2a5dd154031 /arch/i386/Makefile.cpu | |
| parent | [PATCH] i386: pit_latch_buggy has no effect (diff) | |
| download | kernel-qcow2-linux-0949be35095b53dbaa72db700cb5074c5c249629.tar.gz kernel-qcow2-linux-0949be35095b53dbaa72db700cb5074c5c249629.tar.xz kernel-qcow2-linux-0949be35095b53dbaa72db700cb5074c5c249629.zip | |
[PATCH] i386: Add an option for the VIA C7 which sets appropriate L1 cache
The VIA C7 is a 686 (with TSC) that supports MMX, SSE and SSE2, it also has
a cache line length of 64 according to
http://www.digit-life.com/articles2/cpu/rmma-via-c7.html. This patch sets
gcc to -march=686 and select s the correct cache shift.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Andi Kleen <ak@suse.de>
Cc: Andi Kleen <ak@suse.de>
Cc: Dave Jones <davej@codemonkey.org.uk>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Diffstat (limited to 'arch/i386/Makefile.cpu')
| -rw-r--r-- | arch/i386/Makefile.cpu | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/i386/Makefile.cpu b/arch/i386/Makefile.cpu index a32c031c90d7..e0ada4e9e137 100644 --- a/arch/i386/Makefile.cpu +++ b/arch/i386/Makefile.cpu @@ -32,6 +32,7 @@ cflags-$(CONFIG_MWINCHIP2) += $(call cc-option,-march=winchip2,-march=i586) cflags-$(CONFIG_MWINCHIP3D) += $(call cc-option,-march=winchip2,-march=i586) cflags-$(CONFIG_MCYRIXIII) += $(call cc-option,-march=c3,-march=i486) $(align)-functions=0 $(align)-jumps=0 $(align)-loops=0 cflags-$(CONFIG_MVIAC3_2) += $(call cc-option,-march=c3-2,-march=i686) +cflags-$(CONFIG_MVIAC7) += -march=i686 cflags-$(CONFIG_MCORE2) += -march=i686 $(call cc-option,-mtune=core2,$(call cc-option,-mtune=generic,-mtune=i686)) # AMD Elan support |