diff options
| author | Venkatesh Pallipadi | 2007-02-13 13:26:23 +0100 |
|---|---|---|
| committer | Andi Kleen | 2007-02-13 13:26:23 +0100 |
| commit | 44264261d8fb87849118e41b2735bd95db28126f (patch) | |
| tree | c98b84e0fbb39b5fd0437e22171cf2cc472ccf8d /arch/i386/oprofile/op_model_ppro.c | |
| parent | [PATCH] i386: Handle 32 bit PerfMon Counter writes cleanly in i386 nmi_watchdog (diff) | |
| download | kernel-qcow2-linux-44264261d8fb87849118e41b2735bd95db28126f.tar.gz kernel-qcow2-linux-44264261d8fb87849118e41b2735bd95db28126f.tar.xz kernel-qcow2-linux-44264261d8fb87849118e41b2735bd95db28126f.zip | |
[PATCH] i386: Handle 32 bit PerfMon Counter writes cleanly in oprofile
Handle these 32 bit perfmon counter MSR writes cleanly in oprofile.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'arch/i386/oprofile/op_model_ppro.c')
| -rw-r--r-- | arch/i386/oprofile/op_model_ppro.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/i386/oprofile/op_model_ppro.c b/arch/i386/oprofile/op_model_ppro.c index ca2447e05e15..c554f52cb808 100644 --- a/arch/i386/oprofile/op_model_ppro.c +++ b/arch/i386/oprofile/op_model_ppro.c @@ -24,7 +24,8 @@ #define CTR_IS_RESERVED(msrs,c) (msrs->counters[(c)].addr ? 1 : 0) #define CTR_READ(l,h,msrs,c) do {rdmsr(msrs->counters[(c)].addr, (l), (h));} while (0) -#define CTR_WRITE(l,msrs,c) do {wrmsr(msrs->counters[(c)].addr, -(u32)(l), -1);} while (0) +#define CTR_32BIT_WRITE(l,msrs,c) \ + do {wrmsr(msrs->counters[(c)].addr, -(u32)(l), 0);} while (0) #define CTR_OVERFLOWED(n) (!((n) & (1U<<31))) #define CTRL_IS_RESERVED(msrs,c) (msrs->controls[(c)].addr ? 1 : 0) @@ -79,7 +80,7 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs) for (i = 0; i < NUM_COUNTERS; ++i) { if (unlikely(!CTR_IS_RESERVED(msrs,i))) continue; - CTR_WRITE(1, msrs, i); + CTR_32BIT_WRITE(1, msrs, i); } /* enable active counters */ @@ -87,7 +88,7 @@ static void ppro_setup_ctrs(struct op_msrs const * const msrs) if ((counter_config[i].enabled) && (CTR_IS_RESERVED(msrs,i))) { reset_value[i] = counter_config[i].count; - CTR_WRITE(counter_config[i].count, msrs, i); + CTR_32BIT_WRITE(counter_config[i].count, msrs, i); CTRL_READ(low, high, msrs, i); CTRL_CLEAR(low); @@ -116,7 +117,7 @@ static int ppro_check_ctrs(struct pt_regs * const regs, CTR_READ(low, high, msrs, i); if (CTR_OVERFLOWED(low)) { oprofile_add_sample(regs, i); - CTR_WRITE(reset_value[i], msrs, i); + CTR_32BIT_WRITE(reset_value[i], msrs, i); } } |