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| author | Linus Torvalds | 2016-12-12 17:44:23 +0100 |
|---|---|---|
| committer | Linus Torvalds | 2016-12-12 17:44:23 +0100 |
| commit | 0261b5d3a6ed43fa8f801ded6e265d1f3403ad24 (patch) | |
| tree | 867174b8aa40d33b25511bd0d09d3e9c25b6bf4e /arch/m68k/coldfire/m5249.c | |
| parent | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc (diff) | |
| parent | m68knommu: AMCORE board, add iMX i2c support (diff) | |
| download | kernel-qcow2-linux-0261b5d3a6ed43fa8f801ded6e265d1f3403ad24.tar.gz kernel-qcow2-linux-0261b5d3a6ed43fa8f801ded6e265d1f3403ad24.tar.xz kernel-qcow2-linux-0261b5d3a6ed43fa8f801ded6e265d1f3403ad24.zip | |
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
Pull m68knommu updates from Greg Ungerer:
"There are two sets of changes in this pull.
The largest is the addition of the ColdFire platform side i2c support
(the IO addressing, setup and clock definitions). The i2c hardware
module itself is driven by the kernels existing iMX i2c driver.
The other change is the addition of support for the Amcore board"
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
m68knommu: AMCORE board, add iMX i2c support
m68k: add Sysam AMCORE open board support
m68knommu: platform support for i2c devices on ColdFire SoC
Diffstat (limited to 'arch/m68k/coldfire/m5249.c')
| -rw-r--r-- | arch/m68k/coldfire/m5249.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/m68k/coldfire/m5249.c b/arch/m68k/coldfire/m5249.c index e48f55adc447..b16cf9b4580c 100644 --- a/arch/m68k/coldfire/m5249.c +++ b/arch/m68k/coldfire/m5249.c @@ -27,6 +27,8 @@ DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK); DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK); +DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK); +DEFINE_CLK(mcfi2c1, "imx1-i2c.1", MCF_BUSCLK); struct clk *mcf_clks[] = { &clk_pll, @@ -36,6 +38,8 @@ struct clk *mcf_clks[] = { &clk_mcfuart0, &clk_mcfuart1, &clk_mcfqspi0, + &clk_mcfi2c0, + &clk_mcfi2c1, NULL }; @@ -85,6 +89,26 @@ static void __init m5249_qspi_init(void) /***************************************************************************/ +static void __init m5249_i2c_init(void) +{ +#if IS_ENABLED(CONFIG_I2C_IMX) + u32 r; + + /* first I2C controller uses regular irq setup */ + writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, + MCFSIM_I2CICR); + mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); + + /* second I2C controller is completely different */ + r = readl(MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1)); + r &= ~MCFINTC2_INTPRI_BITS(0xf, MCF_IRQ_I2C1); + r |= MCFINTC2_INTPRI_BITS(0x5, MCF_IRQ_I2C1); + writel(r, MCFINTC2_INTPRI_REG(MCF_IRQ_I2C1)); +#endif /* CONFIG_I2C_IMX */ +} + +/***************************************************************************/ + #ifdef CONFIG_M5249C3 static void __init m5249_smc91x_init(void) @@ -111,6 +135,7 @@ void __init config_BSP(char *commandp, int size) m5249_smc91x_init(); #endif m5249_qspi_init(); + m5249_i2c_init(); } /***************************************************************************/ |