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| author | Greg Ungerer | 2011-03-09 00:57:14 +0100 |
|---|---|---|
| committer | Greg Ungerer | 2011-03-15 12:01:54 +0100 |
| commit | 58f0ac98f386d2b335e5852e8feec828c43a0e13 (patch) | |
| tree | e5155ca33386026a9d0b7b2e0de00514f76fd295 /arch/m68k/include/asm/m5272sim.h | |
| parent | m68knommu: move ColdFire DMA register addresses to per-cpu headers (diff) | |
| download | kernel-qcow2-linux-58f0ac98f386d2b335e5852e8feec828c43a0e13.tar.gz kernel-qcow2-linux-58f0ac98f386d2b335e5852e8feec828c43a0e13.tar.xz kernel-qcow2-linux-58f0ac98f386d2b335e5852e8feec828c43a0e13.zip | |
m68knommu: remove use of MBAR in old-style ColdFire timer
Not all ColdFire CPUs that use the old style timer hardware module use
an MBAR set peripheral region. Move the TIMER base address defines to the
per-CPU header files where we can set it correctly based on how the
peripherals are mapped - instead of using a fake MBAR for some platforms.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m5272sim.h')
| -rw-r--r-- | arch/m68k/include/asm/m5272sim.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h index 3b43fee72573..57ca4de1f911 100644 --- a/arch/m68k/include/asm/m5272sim.h +++ b/arch/m68k/include/asm/m5272sim.h @@ -82,6 +82,11 @@ #define MCFDMA_BASE0 (MCF_MBAR + 0xe0) /* Base address DMA 0 */ +#define MCFTIMER_BASE1 (MCF_MBAR + 0x200) /* Base address TIMER1 */ +#define MCFTIMER_BASE2 (MCF_MBAR + 0x220) /* Base address TIMER2 */ +#define MCFTIMER_BASE3 (MCF_MBAR + 0x240) /* Base address TIMER4 */ +#define MCFTIMER_BASE4 (MCF_MBAR + 0x260) /* Base address TIMER3 */ + /* * Define system peripheral IRQ usage. */ |