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| author | Greg Ungerer | 2012-08-17 08:48:16 +0200 |
|---|---|---|
| committer | Greg Ungerer | 2012-09-27 15:33:50 +0200 |
| commit | c986a3d520395604ca29a7fb9fca60a455abcc44 (patch) | |
| tree | 4b7106fc2ce8945cdca7d0d7c55a239c5a901503 /arch/m68k/platform/coldfire/m525x.c | |
| parent | m68knommu: make ColdFire Pin Assignment register definitions absolute addresses (diff) | |
| download | kernel-qcow2-linux-c986a3d520395604ca29a7fb9fca60a455abcc44.tar.gz kernel-qcow2-linux-c986a3d520395604ca29a7fb9fca60a455abcc44.tar.xz kernel-qcow2-linux-c986a3d520395604ca29a7fb9fca60a455abcc44.zip | |
m68knommu: make ColdFire Interrupt Source register definitions absolute addresses
Make all definitions of the ColdFire Interrupt Source registers absolute
addresses. Currently some are relative to the MBAR peripheral region.
The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.
This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/platform/coldfire/m525x.c')
| -rw-r--r-- | arch/m68k/platform/coldfire/m525x.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/m68k/platform/coldfire/m525x.c b/arch/m68k/platform/coldfire/m525x.c index 8ce905f9b84f..fce8f8a45bf0 100644 --- a/arch/m68k/platform/coldfire/m525x.c +++ b/arch/m68k/platform/coldfire/m525x.c @@ -30,7 +30,7 @@ static void __init m525x_qspi_init(void) /* QSPI irq setup */ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0, - MCF_MBAR + MCFSIM_QSPIICR); + MCFSIM_QSPIICR); mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI); #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */ } @@ -42,7 +42,7 @@ static void __init m525x_i2c_init(void) /* first I2C controller uses regular irq setup */ writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, - MCF_MBAR + MCFSIM_I2CICR); + MCFSIM_I2CICR); mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); /* second I2C controller is completely different */ |