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author | Ilya Loginov | 2009-11-26 09:16:19 +0100 |
---|---|---|
committer | Jens Axboe | 2009-11-26 09:16:19 +0100 |
commit | 2d4dc890b5c8fabd818a8586607e6843c4375e62 (patch) | |
tree | 9976ed7b0eed0056f8289aeb6a2b0abf8c940454 /arch/microblaze/include/asm/cacheflush.h | |
parent | cfq: Make use of service count to estimate the rb_key offset (diff) | |
download | kernel-qcow2-linux-2d4dc890b5c8fabd818a8586607e6843c4375e62.tar.gz kernel-qcow2-linux-2d4dc890b5c8fabd818a8586607e6843c4375e62.tar.xz kernel-qcow2-linux-2d4dc890b5c8fabd818a8586607e6843c4375e62.zip |
block: add helpers to run flush_dcache_page() against a bio and a request's pages
Mtdblock driver doesn't call flush_dcache_page for pages in request. So,
this causes problems on architectures where the icache doesn't fill from
the dcache or with dcache aliases. The patch fixes this.
The ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE symbol was introduced to avoid
pointless empty cache-thrashing loops on architectures for which
flush_dcache_page() is a no-op. Every architecture was provided with this
flush pages on architectires where ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE is
equal 1 or do nothing otherwise.
See "fix mtd_blkdevs problem with caches on some architectures" discussion
on LKML for more information.
Signed-off-by: Ilya Loginov <isloginov@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Peter Horton <phorton@bitbox.co.uk>
Cc: "Ed L. Cashin" <ecashin@coraid.com>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
Diffstat (limited to 'arch/microblaze/include/asm/cacheflush.h')
-rw-r--r-- | arch/microblaze/include/asm/cacheflush.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/microblaze/include/asm/cacheflush.h b/arch/microblaze/include/asm/cacheflush.h index f989d6aad648..088076e657b3 100644 --- a/arch/microblaze/include/asm/cacheflush.h +++ b/arch/microblaze/include/asm/cacheflush.h @@ -37,6 +37,7 @@ #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) #define flush_dcache_range(start, end) __invalidate_dcache_range(start, end) +#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 #define flush_dcache_page(page) do { } while (0) #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) |