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author | Russell King | 2009-09-24 22:22:33 +0200 |
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committer | Russell King | 2009-09-24 22:22:33 +0200 |
commit | baea7b946f00a291b166ccae7fcfed6c01530cc6 (patch) | |
tree | 4aa275fbdbec9c7b9b4629e8bee2bbecd3c6a6af /arch/microblaze/kernel/hw_exception_handler.S | |
parent | Merge branch 'master' into for-linus (diff) | |
parent | Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/gi... (diff) | |
download | kernel-qcow2-linux-baea7b946f00a291b166ccae7fcfed6c01530cc6.tar.gz kernel-qcow2-linux-baea7b946f00a291b166ccae7fcfed6c01530cc6.tar.xz kernel-qcow2-linux-baea7b946f00a291b166ccae7fcfed6c01530cc6.zip |
Merge branch 'origin' into for-linus
Conflicts:
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Diffstat (limited to 'arch/microblaze/kernel/hw_exception_handler.S')
-rw-r--r-- | arch/microblaze/kernel/hw_exception_handler.S | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S index 3288c9737671..6b0288ebccd6 100644 --- a/arch/microblaze/kernel/hw_exception_handler.S +++ b/arch/microblaze/kernel/hw_exception_handler.S @@ -84,9 +84,10 @@ #define NUM_TO_REG(num) r ## num #ifdef CONFIG_MMU -/* FIXME you can't change first load of MSR because there is - * hardcoded jump bri 4 */ #define RESTORE_STATE \ + lwi r5, r1, 0; \ + mts rmsr, r5; \ + nop; \ lwi r3, r1, PT_R3; \ lwi r4, r1, PT_R4; \ lwi r5, r1, PT_R5; \ @@ -309,6 +310,9 @@ _hw_exception_handler: lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)) /* get saved current */ #endif + mfs r5, rmsr; + nop + swi r5, r1, 0; mfs r3, resr nop mfs r4, rear; @@ -380,6 +384,8 @@ handle_other_ex: /* Handle Other exceptions here */ addk r8, r17, r0; /* Load exception address */ bralid r15, full_exception; /* Branch to the handler */ nop; + mts r0, rfsr; /* Clear sticky fsr */ + nop /* * Trigger execution of the signal handler by enabling |