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| author | David S. Miller | 2015-03-04 03:16:48 +0100 |
|---|---|---|
| committer | David S. Miller | 2015-03-04 03:16:48 +0100 |
| commit | 71a83a6db6138b9d41d8a0b6b91cb59f6dc4742c (patch) | |
| tree | f74b6e4e48257ec6ce40b95645ecb8533b9cc1f8 /arch/mips/cavium-octeon/csrc-octeon.c | |
| parent | Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsh... (diff) | |
| parent | Merge branch 'for-4.0' of git://linux-nfs.org/~bfields/linux (diff) | |
| download | kernel-qcow2-linux-71a83a6db6138b9d41d8a0b6b91cb59f6dc4742c.tar.gz kernel-qcow2-linux-71a83a6db6138b9d41d8a0b6b91cb59f6dc4742c.tar.xz kernel-qcow2-linux-71a83a6db6138b9d41d8a0b6b91cb59f6dc4742c.zip | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts:
drivers/net/ethernet/rocker/rocker.c
The rocker commit was two overlapping changes, one to rename
the ->vport member to ->pport, and another making the bitmask
expression use '1ULL' instead of plain '1'.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/mips/cavium-octeon/csrc-octeon.c')
| -rw-r--r-- | arch/mips/cavium-octeon/csrc-octeon.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c index b752c4ed0b79..1882e6475dd0 100644 --- a/arch/mips/cavium-octeon/csrc-octeon.c +++ b/arch/mips/cavium-octeon/csrc-octeon.c @@ -18,7 +18,7 @@ #include <asm/octeon/octeon.h> #include <asm/octeon/cvmx-ipd-defs.h> #include <asm/octeon/cvmx-mio-defs.h> - +#include <asm/octeon/cvmx-rst-defs.h> static u64 f; static u64 rdiv; @@ -39,11 +39,20 @@ void __init octeon_setup_delays(void) if (current_cpu_type() == CPU_CAVIUM_OCTEON2) { union cvmx_mio_rst_boot rst_boot; + rst_boot.u64 = cvmx_read_csr(CVMX_MIO_RST_BOOT); rdiv = rst_boot.s.c_mul; /* CPU clock */ sdiv = rst_boot.s.pnr_mul; /* I/O clock */ f = (0x8000000000000000ull / sdiv) * 2; + } else if (current_cpu_type() == CPU_CAVIUM_OCTEON3) { + union cvmx_rst_boot rst_boot; + + rst_boot.u64 = cvmx_read_csr(CVMX_RST_BOOT); + rdiv = rst_boot.s.c_mul; /* CPU clock */ + sdiv = rst_boot.s.pnr_mul; /* I/O clock */ + f = (0x8000000000000000ull / sdiv) * 2; } + } /* |