summaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/dma-mapping.h
diff options
context:
space:
mode:
authorPaul Burton2016-10-05 19:18:16 +0200
committerRalf Baechle2016-10-06 18:02:01 +0200
commit20d330645cfb8cfecfb82b369e4d3084e429e68a (patch)
treec2e0661dbbb76ad83b2645db4291954bbd19c69d /arch/mips/include/asm/dma-mapping.h
parentMIPS: dma-default: Don't check hw_coherentio if device is non-coherent (diff)
downloadkernel-qcow2-linux-20d330645cfb8cfecfb82b369e4d3084e429e68a.tar.gz
kernel-qcow2-linux-20d330645cfb8cfecfb82b369e4d3084e429e68a.tar.xz
kernel-qcow2-linux-20d330645cfb8cfecfb82b369e4d3084e429e68a.zip
MIPS: Support per-device DMA coherence
On some MIPS systems, a subset of devices may have DMA coherent with CPU caches. For example in systems including a MIPS I/O Coherence Unit (IOCU), some devices may be connected to that IOCU whilst others are not. Prior to this patch, we have a plat_device_is_coherent() function but no implementation which does anything besides return a global true or false, optionally chosen at runtime. For devices such as those described above this is insufficient. Fix this by tracking DMA coherence on a per-device basis with a dma_coherent field in struct dev_archdata. Setting this from arch_setup_dma_ops() takes care of devices which set the dma-coherent property via device tree, and any PCI devices beneath a bridge described in DT, automatically. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14349/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/dma-mapping.h')
-rw-r--r--arch/mips/include/asm/dma-mapping.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h
index 12fa79e2f1b4..7aa71b9b0258 100644
--- a/arch/mips/include/asm/dma-mapping.h
+++ b/arch/mips/include/asm/dma-mapping.h
@@ -32,4 +32,14 @@ static inline void dma_mark_clean(void *addr, size_t size) {}
extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
enum dma_data_direction direction);
+#define arch_setup_dma_ops arch_setup_dma_ops
+static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
+ u64 size, const struct iommu_ops *iommu,
+ bool coherent)
+{
+#ifdef CONFIG_DMA_PERDEV_COHERENT
+ dev->archdata.dma_coherent = coherent;
+#endif
+}
+
#endif /* _ASM_DMA_MAPPING_H */