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authorRalf Baechle2014-03-31 18:17:33 +0200
committerRalf Baechle2014-03-31 18:17:33 +0200
commitade63aada79c61bcd5f51cbd310f237399892268 (patch)
tree4f8605528bfd9b6261679883974b9ac4870223dd /arch/mips/include/asm/fpu.h
parentMIPS: CPC: Use __raw_ memory access functions (diff)
parentMIPS: Hibernate: Flush TLB entries in swsusp_arch_resume() (diff)
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Merge branch '3.14-fixes' into mips-for-linux-next
Diffstat (limited to 'arch/mips/include/asm/fpu.h')
-rw-r--r--arch/mips/include/asm/fpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h
index 8a3d61f0017f..4d86b72750c7 100644
--- a/arch/mips/include/asm/fpu.h
+++ b/arch/mips/include/asm/fpu.h
@@ -57,7 +57,7 @@ static inline int __enable_fpu(enum fpu_mode mode)
return 0;
case FPU_64BIT:
-#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_MIPS64))
+#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_64BIT))
/* we only have a 32-bit FPU */
return SIGFPE;
#endif