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author | Ralf Baechle | 2014-03-31 18:17:33 +0200 |
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committer | Ralf Baechle | 2014-03-31 18:17:33 +0200 |
commit | ade63aada79c61bcd5f51cbd310f237399892268 (patch) | |
tree | 4f8605528bfd9b6261679883974b9ac4870223dd /arch/mips/include/asm/fpu.h | |
parent | MIPS: CPC: Use __raw_ memory access functions (diff) | |
parent | MIPS: Hibernate: Flush TLB entries in swsusp_arch_resume() (diff) | |
download | kernel-qcow2-linux-ade63aada79c61bcd5f51cbd310f237399892268.tar.gz kernel-qcow2-linux-ade63aada79c61bcd5f51cbd310f237399892268.tar.xz kernel-qcow2-linux-ade63aada79c61bcd5f51cbd310f237399892268.zip |
Merge branch '3.14-fixes' into mips-for-linux-next
Diffstat (limited to 'arch/mips/include/asm/fpu.h')
-rw-r--r-- | arch/mips/include/asm/fpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h index 8a3d61f0017f..4d86b72750c7 100644 --- a/arch/mips/include/asm/fpu.h +++ b/arch/mips/include/asm/fpu.h @@ -57,7 +57,7 @@ static inline int __enable_fpu(enum fpu_mode mode) return 0; case FPU_64BIT: -#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_MIPS64)) +#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_64BIT)) /* we only have a 32-bit FPU */ return SIGFPE; #endif |