diff options
| author | Maxime Bizon | 2013-06-04 23:53:34 +0200 |
|---|---|---|
| committer | David S. Miller | 2013-06-10 23:28:27 +0200 |
| commit | 0ae99b5fede6f3a8d252d50bb4aba29544295219 (patch) | |
| tree | 3be7197f59057e81f9167f81b658a5eba6cb10cc /arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | |
| parent | bcm63xx_enet: implement reset autoneg ethtool callback (diff) | |
| download | kernel-qcow2-linux-0ae99b5fede6f3a8d252d50bb4aba29544295219.tar.gz kernel-qcow2-linux-0ae99b5fede6f3a8d252d50bb4aba29544295219.tar.xz kernel-qcow2-linux-0ae99b5fede6f3a8d252d50bb4aba29544295219.zip | |
bcm63xx_enet: split DMA channel register accesses
The current bcm63xx_enet driver always uses bcmenet_shared_base whenever
it needs to access DMA channel configuration space or access the DMA
channel state RAM. Split these register in 3 parts to be more accurate:
- global DMA configuration
- per DMA channel configuration space
- per DMA channel state RAM space
This is preliminary to support new chips where the global DMA
configuration remains the same, but there is a varying number of DMA
channels located at a different memory offset.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h')
| -rw-r--r-- | arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h index 336228990808..9981f4f0e42f 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h @@ -173,7 +173,9 @@ enum bcm63xx_regs_set { #define BCM_6358_RSET_SPI_SIZE 1804 #define BCM_6368_RSET_SPI_SIZE 1804 #define RSET_ENET_SIZE 2048 -#define RSET_ENETDMA_SIZE 2048 +#define RSET_ENETDMA_SIZE 256 +#define RSET_ENETDMAC_SIZE(chans) (16 * (chans)) +#define RSET_ENETDMAS_SIZE(chans) (16 * (chans)) #define RSET_ENETSW_SIZE 65536 #define RSET_UART_SIZE 24 #define RSET_UDC_SIZE 256 |