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authorSean Paul2019-05-22 22:08:21 +0200
committerSean Paul2019-05-22 22:08:21 +0200
commit374ed5429346a021c8e2d26fafce14c5b15dedd0 (patch)
tree70739e93443494993197cc11f41c0fd0a0f3aac0 /arch/mips/include/asm/tlb.h
parentvideo/hdmi: Add Unpack function for DRM infoframe (diff)
parentLinux 5.2-rc1 (diff)
downloadkernel-qcow2-linux-374ed5429346a021c8e2d26fafce14c5b15dedd0.tar.gz
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Merge drm/drm-next into drm-misc-next
Backmerging 5.2-rc1 to -misc-next for robher Signed-off-by: Sean Paul <seanpaul@chromium.org>
Diffstat (limited to 'arch/mips/include/asm/tlb.h')
-rw-r--r--arch/mips/include/asm/tlb.h17
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/mips/include/asm/tlb.h b/arch/mips/include/asm/tlb.h
index b6823b9e94da..90f3ad76d9e0 100644
--- a/arch/mips/include/asm/tlb.h
+++ b/arch/mips/include/asm/tlb.h
@@ -5,23 +5,6 @@
#include <asm/cpu-features.h>
#include <asm/mipsregs.h>
-/*
- * MIPS doesn't need any special per-pte or per-vma handling, except
- * we need to flush cache for area to be unmapped.
- */
-#define tlb_start_vma(tlb, vma) \
- do { \
- if (!tlb->fullmm) \
- flush_cache_range(vma, vma->vm_start, vma->vm_end); \
- } while (0)
-#define tlb_end_vma(tlb, vma) do { } while (0)
-#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0)
-
-/*
- * .. because we flush the whole mm when it fills up.
- */
-#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
-
#define _UNIQUE_ENTRYHI(base, idx) \
(((base) + ((idx) << (PAGE_SHIFT + 1))) | \
(cpu_has_tlbinv ? MIPS_ENTRYHI_EHINV : 0))