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author | David Daney | 2008-12-12 00:33:31 +0100 |
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committer | Ralf Baechle | 2009-01-11 10:57:23 +0100 |
commit | babed555695fad25820fb5fb0b5068c56e375900 (patch) | |
tree | aaee9f2ee2700f81b2d156289bec91312ab34ea2 /arch/mips/include | |
parent | MIPS: Add Cavium OCTEON cop2/cvmseg state entries to processor.h. (diff) | |
download | kernel-qcow2-linux-babed555695fad25820fb5fb0b5068c56e375900.tar.gz kernel-qcow2-linux-babed555695fad25820fb5fb0b5068c56e375900.tar.xz kernel-qcow2-linux-babed555695fad25820fb5fb0b5068c56e375900.zip |
MIPS: Add Cavium OCTEON specific registers to ptrace.h and asm-offsets.c
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/ptrace.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h index c2c8bac43307..1f30d16d4669 100644 --- a/arch/mips/include/asm/ptrace.h +++ b/arch/mips/include/asm/ptrace.h @@ -48,6 +48,10 @@ struct pt_regs { #ifdef CONFIG_MIPS_MT_SMTC unsigned long cp0_tcstatus; #endif /* CONFIG_MIPS_MT_SMTC */ +#ifdef CONFIG_CPU_CAVIUM_OCTEON + unsigned long long mpl[3]; /* MTM{0,1,2} */ + unsigned long long mtp[3]; /* MTP{0,1,2} */ +#endif } __attribute__ ((aligned (8))); /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ |