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| author | Huacai Chen | 2017-03-16 14:00:28 +0100 |
|---|---|---|
| committer | Ralf Baechle | 2017-04-10 11:56:08 +0200 |
| commit | 17c99d9421695a0e0de18bf1e7091d859e20ec1d (patch) | |
| tree | b85ec6aa09ba082e12840be02bc2ea09fda28071 /arch/mips/kernel/mips-r2-to-r6-emul.c | |
| parent | MIPS: Delete redundant definition of SMP_CACHE_BYTES. (diff) | |
| download | kernel-qcow2-linux-17c99d9421695a0e0de18bf1e7091d859e20ec1d.tar.gz kernel-qcow2-linux-17c99d9421695a0e0de18bf1e7091d859e20ec1d.tar.xz kernel-qcow2-linux-17c99d9421695a0e0de18bf1e7091d859e20ec1d.zip | |
MIPS: Loongson-3: Select MIPS_L1_CACHE_SHIFT_6
Some newer Loongson-3 have 64 bytes cache lines, so select
MIPS_L1_CACHE_SHIFT_6.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J . Hill <Steven.Hill@caviumnetworks.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/15755/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/mips-r2-to-r6-emul.c')
0 files changed, 0 insertions, 0 deletions