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authorPaul Burton2014-02-14 10:20:15 +0100
committerPaul Burton2014-05-02 17:39:11 +0200
commit5977d682d21cc65a9e0e402e94709e210af04459 (patch)
tree911332b2f6491135032f90f263fb3c3489af0858 /arch/mips/kernel
parentMIPS: allow GIC clockevent device config from other CPUs (diff)
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MIPS: mark R4K clockevent device with CLOCK_EVT_FEAT_C3STOP
When a core enters a clock off or power down state its CP0 counter will be stopped along with it. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/cevt-r4k.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 50d3f5a8d6bb..7820d5d3d475 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -195,7 +195,8 @@ int r4k_clockevent_init(void)
cd = &per_cpu(mips_clockevent_device, cpu);
cd->name = "MIPS";
- cd->features = CLOCK_EVT_FEAT_ONESHOT;
+ cd->features = CLOCK_EVT_FEAT_ONESHOT |
+ CLOCK_EVT_FEAT_C3STOP;
clockevent_set_clock(cd, mips_hpt_frequency);