diff options
| author | Yang Ling | 2016-05-19 06:22:19 +0200 |
|---|---|---|
| committer | Ralf Baechle | 2016-10-04 16:13:57 +0200 |
| commit | a1ca83869d4ea65afd5a6a403d5d5ec2c41ef60e (patch) | |
| tree | 5803546b32133f709de02942cb031850b0e4455a /arch/mips/loongson32/Platform | |
| parent | MIPS: Octeon: Rename upper case variables at setup time. (diff) | |
| download | kernel-qcow2-linux-a1ca83869d4ea65afd5a6a403d5d5ec2c41ef60e.tar.gz kernel-qcow2-linux-a1ca83869d4ea65afd5a6a403d5d5ec2c41ef60e.tar.xz kernel-qcow2-linux-a1ca83869d4ea65afd5a6a403d5d5ec2c41ef60e.zip | |
MIPS: Add CPU support for Loongson1C
Loongson1C is a 32-bit SoC designed by Loongson Technology Co., Ltd,
with many features similar to Loongson1B.
Signed-off-by: Yang Ling <gnaygnil@gmail.com>
Cc: paul.burton@imgtec.com
Cc: markos.chandras@imgtec.com
Cc: james.hogan@imgtec.com
Cc: kumba@gentoo.org
Cc: macro@imgtec.com
Cc: david.daney@cavium.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13303/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson32/Platform')
0 files changed, 0 insertions, 0 deletions